vicharak-in / shrike
Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.
View on GitHubAI Architecture Analysis
This repository is indexed by RepoMind. By analyzing vicharak-in/shrike in our AI interface, you can instantly generate complete architecture diagrams, visualize control flows, and perform automated security audits across the entire codebase.
Our Agentic Context Augmented Generation (Agentic CAG) engine loads full source files into context on-demand, avoiding the fragmentation of traditional RAG systems. Ask questions about the architecture, dependencies, or specific features to see it in action.
Repository Overview (README excerpt)
Crawler viewShrike Shrike is a family of low cost affordable FPGA development board along with a host microcontroller. Currently the family features these two members -: • Shrike-lite (FPGA with RP2040) • Shrike (FPGA with RP2350) And a lot version under development. We usually work on very complex FPGA-based projects built around Vaaman and its upcoming series. However, Shrike is a passion project at Vicharak, driven by our love for engineering across both embedded microcontrollers and FPGAs. Our goal is to make FPGAs accessible to everyone by offering robust toolchains, high-quality hardware, and strong ecosystem support. We’re committed to keeping the hardware prices extremely low, and every piece of software for Shrike will be completely open-source. We at vicharak have kept in mind need of a learner, maker and a hobbyist while designing this art. This dev board will be your stepping stone in the field of FPGA, reconfigurable and heterogenous computing. We invite contributors from all over the world to join us in this mission. Together, let’s make FPGA technology truly accessible to all. Get the Hardware Shrike-lite the RP2040 version of the family is available at our store for worldwide shipping and the Shrike RP2350 version will be available on the crowdsupply soon. You can follow the links below to get both. • Shrike-lite • Shrike Board level Block Diagram Key Features : | **Feature** | **Shrike** | **Shrike-lite** | |:-----------------------------------:|:----------------------------------:|:---------------------------------:| | FPGA | 1120 × 5-input LUTs | 1120 × 5-input LUTs | | MCU | RP2350 | RP2040 | | PMOD Compatible Connector | ✅ | ✅ | | Breadboard Compatible | ✅ | ✅ | | FPGA ↔ MCU IO Interface | ✅ | ✅ | | QSPI Flash | 4 MB | 4 MB | | User LEDs | 2 | 2 | | USB Type-C (Power & Programming) | ✅ | ✅ | Check out • Documentation • Pin_outs • FPGA_CPU_Interconnect 📫 Join our communities at : Note We are building a ecosystem for learners , makers and hobbyist around shrike and the projects that will follow in future, thus we request you contribution in the same. Join our communities across all the platforms, pitch and showcase your ideas with Shrike. Thank You What to contribute ? You can contribute the project's and example's that you have designed on Shrike or any utils that you might have designed. We also have live bounty from time to time check it here Contribution Guideline Your contribution to the Shrike project are always welcome. To contribute fork the project test your changes and create a PR. Few things in to keep in mind for better contribution. • Try to document as much as possible. • Keep your design clean and readable. • Do not push unnecessary directories and .env. • Make sure your changes can be recreated. A Note for Contributors ❤️ We really appreciate everyone’s enthusiasm in improving the project! However, please avoid opening PRs for very small changes such as: • Minor rewording of documentation (that doesn’t improve clarity) • Typo fixes in comments or README • Indentation or formatting-only edits These types of changes create noise in the PR queue and make it harder to review substantial contributions. If you spot something small, feel free to open an **issue** instead so we can batch those improvements together. Thank You LICENSE Software This project’s software is licensed under the GNU General Public License v2.0 (GPL-2.0). See the LICENSEfor details. Hardware This project’s hardware designs (HDL/RTL, schematics, PCB files, constraints, etc.) are licensed under the CERN Open Hardware License v1.2. See LICENSE_HW for details. Useful Links : • FPGA Datasheet - Renesas Forge FPGA • EDA Tool - Go Configure Software Hub • RP2350/RP2040 Related Resources- Getting Started