CerebusOSS / CereLink
Blackrock Neurotech Cerebus Link for Neural Signal Processors
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Repository Overview (README excerpt)
Crawler viewCereLink Software development kit for Blackrock Neurotech neural signal processing hardware (Cerebus, CerePlex, NSP, Gemini). Components • **cbsdk** — C/C++ library for two-way communication with hardware • **pycbsdk** — Python wrapper (cffi, no compiler needed at install time) Architecture Modular library stack: | Module | Purpose | |--------|---------| | | Protocol definitions, packet types, version translation | | | Shared memory (Central-compat and native layouts) | | | Device transport (UDP sockets, handshake, clock sync) | | | SDK orchestration (device + shmem + callbacks + config) | | | CCF XML config file load/save | | | Python package via cffi ABI mode | Connection Modes • **STANDALONE** — CereLink owns the device connection and shared memory • **CLIENT** — Attach to another CereLink instance's shared memory • **CENTRAL_COMPAT CLIENT** — Attach to Central's shared memory with on-the-fly protocol translation Build See BUILD.md for build instructions. Python Or build from source — see pycbsdk/. Testing with nPlayServer On Windows, download and install the latest version of Cerebus Central Suite from the Blackrock Neurotech support website (scroll down). You may also wish to download some sample data from this same website. Testing on localhost Navigate to and run . This runs a device simulator (nPlayServer) and Central on localhost loopback. Testing on network Configure IP addresses: client at 192.168.137.198 or .199, device at 192.168.137.128 (NSP) or 192.168.137.200 (Gemini Hub). Run for options: • Legacy NSP: • Gemini Hub: Linux Network **Firewall:** Replace with your ethernet adapter. **Socket Buffer Size:** Then reboot. Getting Help • Read the project wiki • Search issues on GitHub • Open an issue This is a community project and is not officially supported by Blackrock Neurotech.